Abstract

Recent progress in silicon nanophotonics has dramatically advanced the possible realization of large-scale on-chip optical interconnects integration. Adopting photons as information carriers can break the performance bottleneck of electronic integrated circuit such as serious thermal losses and poor process rates. However, in integrated photonics circuits, few reported work can impose an upper limit of optical power therefore prevent the optical device from harm caused by high power. In this study, we experimentally demonstrate a feasible integrated scheme based on a single all-passive micro-ring resonator to realize the optical power limitation which has a similar function of current limiting circuit in electronics. Besides, we analyze the performance of optical power limiter at various signal bit rates. The results show that the proposed device can limit the signal power effectively at a bit rate up to 20 Gbit/s without deteriorating the signal. Meanwhile, this ultra-compact silicon device can be completely compatible with the electronic technology (typically complementary metal-oxide semiconductor technology), which may pave the way of very large scale integrated photonic circuits for all-optical information processors and artificial intelligence systems.

Highlights

  • Recent progress in silicon nanophotonics has dramatically advanced the possible realization of large-scale on-chip optical interconnects integration

  • Makri theoretically proposed the concept of reflective power limiter based on nonlinear localized modes[25], where a nonlinear layer was sandwiched by two reflective mirrors, increased the device complexity, and no experiment was carried out to verify the performances of the power limiter

  • We propose and experimentally demonstrate an all-passive chip-integrated optical power limiter based on a single silicon micro-ring resonator (MRR)

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Summary

Introduction

Recent progress in silicon nanophotonics has dramatically advanced the possible realization of large-scale on-chip optical interconnects integration. Adopting photons as information carriers can break the performance bottleneck of electronic integrated circuit such as serious thermal losses and poor process rates. In integrated photonics circuits, few reported work can impose an upper limit of optical power prevent the optical device from harm caused by high power. The results show that the proposed device can limit the signal power effectively at a bit rate up to 20 Gbit/s without deteriorating the signal This ultra-compact silicon device can be completely compatible with the electronic technology (typically complementary metal-oxide semiconductor technology), which may pave the way of very large scale integrated photonic circuits for all-optical information processors and artificial intelligence systems. We propose and experimentally demonstrate an all-passive chip-integrated optical power limiter based on a single silicon micro-ring resonator (MRR). For a given pump light with the wavelength fixed at the cold cavity resonance-wavelength, one stable solution of DT for Eq (1) can be calculated, inducing a stable red-shift of the resonance described as Eq (2)

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