Abstract

Next generation implantable neural interfaces are targeting devices with mm-scale form factors that are freely floating and completely wireless. Scalability to more recording (or stimulation) channels will be achieved through distributing multiple devices, instead of the current approach that uses a single centralized implant wired to individual electrodes or arrays. In this way, challenges associated with tethers, micromotion, and reliability of wiring is mitigated. This concept is now being applied to both central and peripheral nervous system interfaces. One key requirement, however, is to maximize specific absorption rate (SAR) constrained achievable wireless power transfer efficiency (PTE) of these inductive links with mm-sized receivers. Chip-scale coil structures for microsystem integration that can provide efficient near-field coupling are investigated. We develop near-optimal geometries for three specific coil structures: in-CMOS, above-CMOS (planar coil post-fabricated on a substrate), and around-CMOS (helical wirewound coil around substrate). We develop analytical and simulation models that have been validated in air and biological tissues by fabrications and experimental measurements. Specifically, we prototype structures that are constrained to a 4mm 4mm silicon substrate, i.e., the planar in-/above-CMOS coils have outer diameters 4mm, whereas the around-CMOS coil has an inner diameter of 4mm. The in-CMOS and above-CMOS coils have metal film thicknesses of 3- m aluminium and 25- m gold, respectively, whereas the around-CMOS coil is fabricated by winding a 25-m gold bonding wire around the substrate. The measured quality factors (Q) of the mm-scale Rx coils are 10.5 @450.3MHz (in-CMOS), 24.61 @85MHz (above-CMOS), and 26.23 @283MHz (around-CMOS). Also, PTE of 2-coil links based on three types of chip-scale coils is measured in air and tissue environment to demonstrate tissue loss for bio-implants. The SAR-constrained maximum PTE measured (together with resonant frequencies, in tissue) are 1.64% @355.8MHz (in-CMOS), 2.09% @82.9MHz (above-CMOS), and 3.05% @318.8MHz (around-CMOS).

Highlights

  • M ILLIONS of people worldwide are affected by neurological and psychiatric disorders, in addition to damages to the nervous system due to stroke, spinal cord injury (SCI), or traumatic brain injury (TBI)

  • The associated micro-motion increases the risk of damage to the blood-brain barrier (BBB) that can lead to scar formation and failure of the device in the long run [2]

  • The coil terminals are bonded to two pads on a T-shaped PCB that is connected to an SMA connector

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Summary

Introduction

M ILLIONS of people worldwide are affected by neurological and psychiatric disorders, in addition to damages to the nervous system due to stroke, spinal cord injury (SCI), or traumatic brain injury (TBI). Most human trials in Brain Machine Interfacing (BMIs) are utilizing percutaneous wired connections for powering and communication. Breaking through the skin (or tissue), poses a significant risk of infection [1]. A tethered approach requires anchoring a rigid micro-electrode array (MEA) within soft, delicate tissue. The associated micro-motion increases the risk of damage to the blood-brain barrier (BBB) that can lead to scar formation and failure of the device in the long run [2]. It is highly desirable to have devices that can avoid the tethering problem by utilizing Wireless Power Transfer (WPT) [3]

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