Chip design of an UWB and high gain on-chip transformer receiver front-end

Abstract

An ultra-wideband receiver front-end operating in 3.1–8.0 GHz frequency range is presented. The proposed front-end consists of on-chip transformer low-noise amplifier, passive balun, double-balanced mixer, and is fabricated in a TSMC 0.18 μm CMOS process with 1.8 V supply voltage. Measured results show that maximum conversion gain of 30.32 dB, noise figure less than 5.9 dB, input return loss (S11) smaller than −15.3 dB, input-referred third-order intercept point of −21.4 dBm, 1 dB compression point (P1 dB) of −30 dBm over the whole frequency range of interest are achieved. In addition, isolations of LO to RF and LO to IF are less than −57 dB and −27.8 dB, respectively, chip area including pads is only 0.985 mm2 and power dissipation is 36.88 mW. The realized front-end achieves the smallest chip area and the best merit of figure compared with previously reported front-ends. © 2011 Wiley Periodicals, Inc. Microwave Opt Technol Lett 53:1422–1427, 2011; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.25956