Charge Trapping Control in MOS Capacitors

Abstract

This paper presents an active control of capacitance–voltage (C–V) characteristic for MOS capacitors based on sliding-mode control and sigma–delta modulation. The capacitance of the device at a certain voltage is measured periodically and adequate voltage excitations are generated by a feedback loop to place the C–V curve at the desired target position. Experimental results are presented for an n-type c-Si MOS capacitor made with silicon dioxide. It is shown that with this approach, it is possible to shift the C–V curve horizontally to the desired operation point. A physical analysis is also presented to explain how the C–V horizontal displacements can be linked to charge trapping in the bulk of the oxide and/or in the silicon–oxide interface. Finally, design criteria are provided for tuning the main parameters of the sliding-mode controller.