Charge trapping analysis in sputtered BixSe1-x based accumulation-mode FETs. II. Gate capacitance characteristics

Protyush Sahu,Jun-Yang Chen,Jian-Ping Wang

doi:10.1063/9.0000027

Abstract

In this study, we extend the analyses done on sputtered BixSe1-x based accumulation mode FETs. Previously, we studied the basic electrical and leakage properties of these FET devices. We extend our analyses to obtain key parameters of the BixSe1-x (x = 0.44) film at various gate voltages. We start by extracting the sheet carrier density and bulk mobility for different gate voltages, using the Drude model with the previously obtained semi-empirical relationship between carrier concentration and bulk mobility for BixSe1-x. The change in sheet carrier density is a result of accumulation or depletion or majority carriers from the BixSe1-x/SiO2 interface, which show hysteretic behavior. This allows us to calculate the surface sheet carrier density and the quasi-static capacitance at various gate voltages. We use a simple capacitive model to separate the capacitance originating from the gate and the film bulk. The capacitance from the film bulk is due to the surface charge thickness and is directly dependent on the Debye length. From the change of capacitance, with respect to gate voltage, we were able to identify the characteristics of the conduction band edge and the bulk band gap/Dirac cone.

Highlights

Topological insulators (TI) are a key group in condensed matter research
We start by first characterizing the carrier concentration and the mobility of the films
Our calculations suggest that the change in voltage, during field effect transistors (FETs) device operation cannot be accounted for by leakage current, which will lead to miniscule changes

Summary

Introduction

Topological insulators (TI) are a key group in condensed matter research. These materials contain ballistic high mobility surface carriers, which can be useful for many applications. Two major application areas are: high electron mobility transistors and spintronics. The key ingredient of the surface states is the topological protection, which is provided by time-reversal symmetry and can eliminate electron backscattering. several other surface scattering processes can dominate, making the surface transport similar to that of the bulk. A key bottleneck for TIs is the high-quality thin film deposition/growth techniques required to obtain the topological protection. This makes the production of the films difficult for CMOS applications. Topological insulators (TI) are a key group in condensed matter research These materials contain ballistic high mobility surface carriers, which can be useful for many applications.. A key bottleneck for TIs is the high-quality thin film deposition/growth techniques required to obtain the topological protection.. A key bottleneck for TIs is the high-quality thin film deposition/growth techniques required to obtain the topological protection.11 This makes the production of the films difficult for CMOS applications. Quantum confinement creates additional dispersive bands, which are spin-momentum locked Further analysis of these dispersive bands show the probability distribution of the electron wavefunction of these bands in real space.. Further analysis of these dispersive bands show the probability distribution of the electron wavefunction of these bands in real space.12 They are concentrated at the edges of the individual grains..

Results

Discussion

Conclusion