Charge storage impact on input capacitance in p-GaN gate AlGaN/GaN power high-electron-mobility transistors

Abstract

In this paper, input capacitance (CISS) of p-GaN gate AlGaN/GaN power high-electron-mobility transistors (HEMTs) is systemically investigated. CISS includes gate-to-source capacitance (CGS) and gate-to-drain capacitance (CGD). In comparison with the normally-on HEMTs, it is found that the phenomenon of CISS variation is different in the commercial p-GaN gate HEMTs. The unique charge storage effect in the typical p-GaN layer is adopted and discussed to explain the variation of CISS and establish the underlying mechanism. Owing to the depletion of holes, net negative charges are induced in the p-GaN layer under an off-state drain bias. It is demonstrated that the negative charge storage makes significant contribution to the increase of CGS before the two-dimensional-electron-gas channel under source-field-plate (SFP) pinches off. Due to the clamped electric field distributions at drain-side edge of the p-GaN layer, the charge storage stops changing CGS after the SFP pinche-off. Additionally, the storage has a minor influence on the variation of CGD. Verified by the experimentally calibrated TCAD simulation, this work reveals a novel mechanism of charge storage impact on CISS variation in p-GaN gate AlGaN/GaN power HEMTs, which is of benefit to the CISS related capacitance design and gate driver optimization of the devices.