Abstract

Real-time sensing of (spin-dependent) single-electron tunneling is fundamental to electrical readout of qubit states in spin quantum computing. Here, we demonstrate the feasibility of detecting such single-electron tunneling events using an atomically planar charge sensing layout, which can be readily integrated in scalable quantum computing architectures with phosphorus-donor-based spin qubits in silicon (Si:P). Using scanning tunneling microscopy (STM) lithography on a Si(001) surface, we patterned a single-electron transistor (SET), both tunnel and electrostatically coupled to a coplanar ultrasmall quantum dot, the latter consisting of approximately four P donors. Charge transitions of the quantum dot could be detected both in time-averaged and single-shot current response of the SET. Single electron tunneling between the quantum dot and the SET island on a time-scale (τ ∼ ms) two-orders-of-magnitude faster than the spin-lattice relaxation time of a P donor in Si makes this device geometry suitable for projective readout of Si:P spin qubits. Crucial to scalability is the ability to reproducibly achieve sufficient electron tunnel rates and charge sensitivity of the SET. The inherent atomic-scale control of STM lithography bodes extremely well to precisely optimize both of these parameters.

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