Charge Pumping Memory with SOS-MOS Transistors

Abstract

Charge pumping memory cell consists of only one SOS-MOS transistor without any storage capacitor, and is expected to realize a very high density dynamic RAM. The memory array of this cell is studied theoretically and experimentally. The conditions for the selective READ/WRITE operations are described. The method to refresh the cells is also presented. P-channel Si-gate test devices are fabricated. The selective READ/WRITE operations and the non-destructive readouts are demonstrated. A `1' state is metastable and decays to a `0', but a T state is distinguishable even at 300 µ after the `WRITE `1' operation.