Charge Defects, Vt Shifts, and the Solution to the High-K Metal Gate n-MOSFET Problem

Abstract

The requirements for a high-k metal gate n-mosfet solution are that one has a device that exhibits a low Tinv (<1.5 nm), high mobility (~200 @ 1MV/cm) and a threshold voltage in the range of 0-0.2V. While these properties have been independently demonstrated, the key challenge has been to deliver these properties simultaneously and in a gate first , high temperature process flow. We show, that by introducing a new, ultrathin lanthanum oxide dielectric layer in the gate stack, whose function is to provide an electrostatic shift to the onset of threshold these requirements can be acceptably met. This is carried out without compromising gate capacitance and with minimal degradation to the mobility. The underlying physics behind the threshold shift will also be discussed.