Charge carrier lifetime measurements on high purity silicon

Abstract

The leakage current of (strip) detectors strongly depends on the way the wafers have been processed. The charge carrier lifetime is an important parameter that can be used to describe this dependence. This paper outlines a method that can be used to measure this parameter on high purity silicon. Although the physical principles of existing methods are generally applicable, care should be taken when applying these methods on high purity silicon. The method proposed is a modification of the linear sweep method of Pierret and uses a MOS capacitor. Several anomalies make it difficult to obtain the actual generation lifetime: the fast response time of the capacitance transient, the two- and three-dimensional lateral effects, a depletion layer dependent diffusion contribution and the high series resistance. Results obtained by applying the method to differently processed wafers are presented.