Abstract
Tunnel oxide passivating contact (TOPCon) technology has attracted much attention in the crystalline silicon (c-Si) photovoltaic (PV) community due to overwhelming advantages for device efficiency and cost. However, fundamental device physics of the core structure of TOPCon (i.e., the polycrystalline silicon [poly-Si]/silicon oxide [SiO x ]/c-Si junction), are not yet fully understood. Here, we conduct extensive experiments and simulations to clarify the underlying dynamics of the junction featuring local pinholes, including pinhole formation processes and charge-carrier transport mechanisms. The pinhole formation process is investigated by following the film dynamics, which suggest that stress due to thermal expansion is probably responsible for SiO x film fracture. The carrier transport mechanism of the poly-Si/SiO x /Si junction is numerically investigated, revealing that tunneling charge-carrier transport couples with direct transport through pinholes. Moreover, a detailed current-recombination analysis in conjunction with predictions of device efficiencies is demonstrated, providing a specific technical route to promote device efficiencies to 27%. • Pinhole formation process is probed by thermal expansion model • Carrier transport through-tunneling and pinholes are theoretically confirmed • A systematic model to evaluate passivation and contact properties is established • The best devices show an average efficiency over 23.5% on the large-area wafers By combining experiments and simulations, Yang et al. reveal the formation process of pinholes and charge-carrier transport mechanisms of poly-Si/SiO x /c-Si contacts. This work may shed light on the underlying device physics of the poly-Si/SiO x /c-Si junctions and provides guidance on achieving high-efficiency TOPCon devices.
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