Characterization of Thermally Induced Stress in IC Packages Using PiFETs Over a Temperature Range of −180°C to 80°C

Abstract

In certain applications, IC packages may be exposed to extreme temperatures and knowledge of thermally induced stress aids the prediction of performance degradation or failure of the IC. In the devices that are used in extreme conditions, the stress is caused mainly by the mismatch in expansion of various materials triggered by the different coefficients of thermal expansion. This work performed in this study is conducted using NMOS current mirror circuits that are cycled through a wide temperature range of −180°C to 80°C. These circuits are highly sensitive to stress and provide well-localized measurements of shear stress. The sensors are fabricated in such a way that the effects of certain stress components are isolated. These sensors are also temperature compensated so that only the effect of mechanical stress components is observed and changes in device performance due to temperature changes are minimal. Current readings obtained from the sensors are used to extract the shear stress component. Finite element simulations, using expected materials performance parameter information were also performed for similar packages and these results are compared to the measured results.