Characterization of the Noise Properties of DC to DC Converters for the sLHC

Abstract

The upgrade of the LHC experiments sets new challenges for the powering of the detectors. One of the powering schemes under study is based on buck converters mounted on the front-end modules. The switching noise emitted by these converters is susceptible to affect the performance of the powered systems. A model to identify and to control the noise sources of the converter was developed. A reference test setup with associated measurement methods is used to characterize the noise properties of the converter. Complementary tools and simulations were also used to evaluate the noise couplings at system level. Switched power conversion topology for the sLHC The experiments at the sLHC will be more demanding in terms of power and cabling than at the LHC, in particular for the trackers. The cabling constrains of the detectors, together with the thermal management and the overall power efficiency force the development of new radiation hard and magnetic field tolerant powering. One of the proposed powering schemes is based on air core buck converters to be distributed on the front end modules of the trackers (Fig. 1). The switching converter and its air core inductor will sit in the close vicinity of the front-end detectors and electronics. The front-end system will be exposed to new sources of noise from the power converters, in the form of conducted and radiated noise. To achieve the required detector performance, these noise sources must be understood so that a suitable grounding, shielding and filtering methods can be applied. In the proposed buck converter, the dominant noise sources are (Fig.2): dV/dt at the phase node between the two switches, that develops common mode currents on the input and output cables through on-board and stray capacitances. dI/dt at the drain tracks that connect to the switches, that develop common mode currents on the input and output cables through near field inductive coupling. dφ/dt radiated by the inductor that will develop common mode and differential mode disturbances in the front-end module. Measurement method The accurate and reproducible measurement of the conducted noise requires the use of a well defined test setup (Fig.3): A plain ground plane to define a low impedance return path for the common mode currents. Standardized line impedance stabilization network (LISN) on both input and output ports to set a known impedance between each wire and the ground plane. The LISN provides a 50 Ω common mode impedance to the ground plane between 150 kHz and 30 MHz. The input and output cables are shielded, with the shield ends bonded to the ground plane. Conducted noise modeling The contribution of the switches drain to source voltage to the conducted noise is modeled in PSpice on the basis of the buck converter connected between the LISNs, above a ground plane (Fig.5): The PSpice model includes the printed circuit board capacitances estimated with Ansoft Q3D (Fig. 6), and the measured model of each decoupling capacitor (Fig. 7). The switches are replaced in the model by normalized voltage sources of 1V, phased out by 180 degrees, in order to make the circuit linear. This allows predicting the input and output common mode current for a normalized switch voltage of 1V at each harmonic frequency. To obtain the net common mode current, each normalized frequency peak obtained from the PSpice simulation is then weighted with the corresponding FFT peak of the measured drain to source voltage (Fig. 8). Fig.6: The board copper geometry is analyzed with Ansoft Q3D tool to extract the values of the critical stray capacitances between tracks and copper planes. Allegro/Q3D Board parasitic extraction with Ansoft Q3D Board capacitances modeling Fig.7: The exact capacitances, series resistance and inductance of every decoupling capacitors is measured with an impedance analyzer. Decoupling capacitances modeling