Characterization of Stochastic Process Variability Effects on Nano-Scale Analog Circuits

Abstract

With the downscaling of CMOS technology in the ultra-deep sub-micron regime, statistical variations of process parameters become significant in characterizing the overall manufacturability and yield of integrated circuits. The increasing amount of intra-die process variability has imposed serious challenges on the conventional integrated circuit design methodologies when applied to nano-scale integrated circuits. Because of such variabilities, integrated circuits designed using conventional design methodology become susceptible to variations in performances like delay, leakage power, etc. Some dominant process parameters are threshold voltage, oxide thickness, etc., which are included within standard compact models used in the circuit simulation process. In the nano-scale regimes, there are many parameters which are physical as well as empirical in nature associated with these fundamental process parameters. The extracted values of these parameters change from one device to another in a die/wafer. Therefore, statistical design methodologies have become an indispensable part of the design process of modern nano-scale integrated circuits. It requires statistical characterization techniques and incorporation of the same in the design process. The most commonly used approach of statistical characterization involves the various fixed corner case models for n-channel and p-channel MOS transistors. A fixed offsets vary the dominant process parameters, and the design is simulated for these offset parameters. Another method is probabilistic sampling, where offset values of each process parameter have a preassigned non-zero probability of being selected in the statistical characterization process. Once the sample set is constructed, it is important to characterize it through descriptive statistical measures. It is very important to find methods of drawing conclusions or making decisions about entire population characteristics based on the information collected from a sample drawn from population. This chapter introduces the idea of statistical design characterization for nano-scale analog integrated circuits.