Abstract

Ge0.2Si0.8 Quantum Well p-MOSFETs with very thin gate oxides of 5 nm, 2.5 nm cap-layer and an optional Boron doped delta layer fabricated in a standard 0.6 Μm CMOS process have been analysed by C-V and I-V measurements at different temperatures. The maximum low field hole mobility calculated from drain conductance was increased by 70%; from 67 cm2/Vs for a reference Silicon epi transistor to 115 cm2/Vs at 300 K and by 100%; from 110 cm2/Vs to 220 cm2/Vs at 98 K. These values were obtained at relatively high doping concentrations in the channel, the mobile channel charge was directly obtained from high and low frequency C-V curves. The influence of the net doping density in the channel region on the device characteristics is demonstrated. In the high electric field region the drain current in the saturation region was improved by 20%; for the same threshold voltage.

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