Characterization of program and erase properties using Fowler–Nordheim tunneling in the 30 nm silicon–oxide–nitride–oxide–silicon transistor

Abstract

The program and erase properties of 30 nm silicon–oxide–nitride–oxide–silicon transistors with ultra-thin oxide–nitride–oxide multi-layer of thickness 2.3/6/4.5 nm are evaluated as a function of a pulse width and a gate bias voltage. SONOS transistor was fabricated utilizing sidewall patterning technique on SOI substrate. We attempted to characterize the electrical properties based on Fowler–Nordheim tunneling. Under the program/erase condition like 11 V for 100 ms and −11 V for 100 ms, we observed that program and erase threshold window appears as 2 and 2.35 V, respectively with changing gate bias voltage. On the other hand, in the pulse mode, we found that the threshold windows were 2.3 and 2.5 V, respectively. Also, we confirmed that the applied pulse width plays an important role in determining the operational condition as compared with the applied voltage does. As for the retention characteristic, the threshold window was kept in 2.44 V at the room temperature after 10 4 s, which implicated the threshold would decrease to 1.45 V after 10 years. In addition, we found that the initial memory window was maintained until 10,000 cycles of program and erase without any change.