Abstract

As IC density shrinks based on Moore’s law, optical lithography continually is scaled to print ever-smaller features by using resolution enhancement techniques such as phase shift mask, optical proximity correction (OPC), off-axis illumination and sub-resolution assistant features. OPC has been playing a key role to maximize the overlapping process window through pitch in the sub-wavelength optical lithography. As an important cost control measure, one general OPC model is applied to the full exposure field across multiple scanners. To implement this technique, optical proximity matching of line width across the field and across multiple tools turns out to be very crucial particularly at gate pattern. In addition, it is very important to obtain reliable critical dimension (CD) data sets with low noise level and high accuracy from the metrology tool. Otherwise, extracting the real scanner fingerprint in term of CD can not be achieved with precision in the order of 1nm~2nm. Scatterometry CD measurements have demonstrated excellent results to overcome this problem. The methodology of Scatterometry is emerging as one of the best metrology tool candidates in terms of gate line width control for technology nodes beyond 130nm. This paper investigates the sources of error that consume the CD budget of optical proximity matching for line through pitch (LTP). The study focuses on the 130nm technology node and uses experimental data and Prolith resist vector model based simulations. Scatterometer CD measurements of LTP are used for the first time and effectively correlated to lens aberrations and effective partial coherence (EPC) measurements which were extracted by Litel In-situ Interferometer (ISI) and Source Metrology Instrument (SMI). Implications of optical proximity matching are also discussed for future technology nodes. From the results, the paper also demonstrates the efficacy of scatterometer line through pitch measurements for OPC characterization.

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