Characterization Of Metallurgical Channel Length And Gate Electrode's Physical Dimension For Device Analysis And Calibration Of Numerical Process And Device Simulators

Abstract

Accurate determination of metallurgical channel length (L,,, ), and gate electrode’s physical dimension ( Lgate) and fringing capacitance (C,) of submicron MOSFETs is of fundamental value to the study of cause-effect relation between processing condition and device’s performance and reliability, device scaling, and the calibration of physical models in numerical process and device simulators. Comparing to conventional methods [ 1-41, this paper describes two capacitance-based measurement techniques for non-destructive and much more accurate characterization of L,,,, L,, and Ck, while requiring only simple device structures. L,, characterization is based on the independence of MOSFET’s gate-source/drain capacitance (C,,) on gate bias (V,,.) at V,, up to the channel inversion threshold (Vi:) and the assumption that L,,, can be determined from Ci:, the capacitance at Vi:. On the other hand, the determination of Lgate utilizes the V,, dependence of MOS capacitor and the linear dependence of MOS capacitance on Lgate. A fundamental assumption in L,, extraction is the V,, independence of Ck. Simulation of a wide range of MOSFET and MOS capacitor structures that are different in gate oxide thickness (To,), LDD and channel doping concentration, and source/drain reoxidation induced To, thickening have been performed to understand and evaluate in detail the various assumptions, and the applicability and limitations of these two device characterization techniques. The results demonstrated consistently that the accuracy in L,,, and Lgak extraction from capacitances is better than 1508,. The device characterization techniques presented in this paper have been applied to MOSFET and MOS capacitors fabricated in several submicron CMOS technologies. Extensive numerical device simulation have shown that L,, of submicron MOSFETs determined from [ C,,( VF ) - Ci: 3 /CO, agree with values obtained directly from channel doping profiles to within 150A (Fig. 1 ). C,,( Vr) and CO, are, respectively, the total gate capacitance of short channel MOSFETs and the per unit area gate capacitance of large area capacitor at very high inversion levels. Detailed numerical results have also demonstrated the applicability of this technique to MOSFETs with To, ranging from 40 to 150 A, wide range of LDD impurity profiles (Fig. 2), non-uniform To, due to source/drain reoxidation (Fig. 3) and poly gate depletion. The physical reason for achieving highly accurate extraction even in the presence of fringing field between the source/drain side wall and the gate was investigated using device simulation (Fig. 4). The cause for degradation in Lmet extraction accuracy when To,>200A was also studied. Noted that the data selection for and the accuracy of L,,, determination is well-defined and is better than 150 8, as compared to 0.1 pm for the methods discussed in [2-41. This method has been applied to characterize Lmet of fabricated n- and p-channel MOSFETs (Fig. 5 ). Extensive experimental data demonstrated the repeatability in data acquisition and the consistency in L,, extraction. In addition, the electrical channel length (Leff) extracted from drain current and L,,, from capacitance data are compared to demonstrate the incorrectness in using Leff as a quantitative measure of submicron MOSFET’s metallurgical channel length ( Fig. 6 ). Detailed device simulation was used to validate the physical basis of the Lgate characterization method including the bias independence of Cfi, the proximity effect of the heavily doped regions resulted from poly gate implant in self-aligned CMOS technologies, limits of its applicability in terms of channel doping concentration and To,, and the consistency in extracted Lgate using data at different biases. The theoretical analysis of the L,, characterization method has been partially presented in [5]. In this paper, experimental CV data and experimental verification of the accuracy in L,, extraction will be presented for the first time. Combined experimental results from L,,, and L,, characterization have been applied to calibrate model parameters in device and process simulators for modeling physical effects such as velocity saturation, punchthrough, threshold voltage variation with LeH, and 2-D impurity diffusion.