Characterization of integrated logic circuits

Abstract

The characterization of integrated logic circuits must be accomplished in a manner which fully accounts for the circuit's nonlinear behavior and is amenable to experimental verification. The approach taken in this paper is to describe both the dc and the transient performance of the circuit by developing nonlinear equivalents of the 2-port "black box" parameters used in specifying linear networks. Such terminal parameter characterization has the obvious advantage of eliminating the need to probe the integrated circuit for testing purposes. In addition, knowledge of terminal performance is a necessity when the circuit is studied from a system point of view. In this paper an emitter-coupled logic circuit is used as an example to illustrate the analysis techniques. After accomplishing the terminal parameter characterization of this circuit, attention is directed towards using these results to establish a design procedure. To this end the relationship that exists between power consumption and the circuit safety margins is explored, and the minimum power-delay time product is derived. The analysis accounts for the parasitics which are present in a monolithic integrated circuit and illustrates the use of the nonlinear transistor model.