Characterization of Clean after Photoresist Removal from Wafers with Copper Pillars with Lead-Free Solder Caps

Abstract

Opportunities for developing new and enabling packaging schemes are being pursued as part of device improvement strategies for electronic products. Processes such as embedded technologies in wafer level packaging and 3-D chip architecture schemes open up opportunities for realization of a variety of package configurations. As a result, there are many opportunities to impact both device performance and the processes used to create them. In the area of electroplated solder applications, there has been widespread adoption of copper pillar bumps with lead free solder caps. Solder wetting of only the copper pillars after reflow confines the spread of the solder cap in the x,y plane enabling tighter pitch layouts, while the smaller solder cap still improves the robustness of the interconnection. However, as more data is gathered using this process, one area of growing interest is the characterization of polymer photoresist residue on the side walls of plated copper pillars with lead-free solder caps. As has been seen with other processes including for example, redistribution line (RDL) cleaning processes, cleaning challenges have increased in tighter pitch applications. In RDL, cleaning challenges were increased as cleaning processes that were once taken for granted were now being applied to wafers with 10μm line/space and tighter pitches. Analogies can be found in the tight pitch copper pillar cleans. Typical characterization techniques such as optical microscopy have been used traditionally in the industry as a post process inspection method. Advantages such as ease of use, fast throughput, automated tooling, use of filters to highlight certain defect types, and the ability to non-destructively inspect whole wafers have all contributed to its success in the field. With tighter pitch copper pillar applications, inspection using optical microscopy is challenged in an extreme and it is possible to inspect a clean copper pillar wafer and not see photoresist residue on the copper side walls. This paper will describe wet cleaning processes used today for copper pillar cleans, with special focus on characterization of the Cu pillar and solder side walls. Examples using several different photoresists and copper and solder configurations will be examined. Samples with differing copper/solder bump heights and pitches will be discussed. Cleaning and compatibility results will be shown.