Characterization of an Oxide Trap Leading to Random Telegraph Noise in Gate-Induced Drain Leakage Current of DRAM Cell Transistors

Abstract

An accurate method for extracting the depth and the energy level of an oxide trap from random telegraph noise (RTN) in the gate-induced drain leakage (GIDL) current of a metal-oxide-semiconductor field-effect transistor (MOSFET) is developed, which correctly accounts for variation in surface potential and Coulomb energy. The technique employs trap capture and emission times defined from the characteristics of GIDL. Ignoring this variation in surface potential leads to an error of up to 116% in trap depth for 80-nm technology generation MOSFETs. RTN amplitude as a function of MOSFET drain-gate voltage is also investigated.