Abstract

(100)-dominantly oriented poly-Si film was realized by using multi-line beam (MLB) continuous-wave laser lateral crystallization (CLC) with overlapping. Si grains were developed along laser scanning direction with an average grain size of approximately 20 μm x 2 μm. The fabricated TFTs have high field effect mobility up to 1010 cm2/Vs. In this work, the device characteristics of the fabricated TFTs are investigated. Fabrication process of the poly-Si TFTs are as follows: A buffer SiO2 layer of 1 μm thickness was deposited on a quartz substrate by Plasma-Enhanced Chemical Vapor Deposition (PECVD). Sequentially, an amorphous Si (a-Si) film of 150 nm thickness and a cap SiO2 of 100 nm thickness were deposited by PECVD. The films were dehydrogenated by furnace annealing at 490 oC in N2 ambient for an hour before crystallization with MLB-CLC (wavelength: 532 nm, laser power: 6 W). The laser beams scanned the sample at a speed of 0.8 cm/s with an overlapping ratio of 83%. After the cap SiO2 layer was etched by buffered hydrofluoric acid (BHF) solution, the poly-Si active layer was patterned using lithography and dry etching (Cl2: 20 sccm, HBr: 20 sccm). Gate oxide SiO2 of 42 nm thickness was deposited by Electron cyclotron Resonance (ECR) Plasma Chemical Vapor Deposition (SiH4: 0.6 sccm, O2: 10 sccm, Ar: 40 sccm) and Mo gate electrode of 300 nm thickness was deposited by sputtering. Patterning gate electrodes was carried out by lithography and wet etching (H3PO4:HNO3:CH3COOH:H2O = 400:25:50:25), followed by self-aligned source and drain formation by As ion implantation (ion dose: 2 x 1015 cm-2, accelerating voltage: 66 kV) using the Mo gate as mask. Activation annealing treatment was performed at 550 oC in N2 ambient for 30 minutes. Before SiO2 insulator film of 600 nm was deposited by Atmospheric Pressure Chemical Vapor Deposition (APCVD), sacrificial SiO2 in source and drain region was etched by BHF. Contact hole was formed by lithography and BHF wet etching. Mo metal pad of 700 nm thickness was deposited by sputtering and patterned by lithography and wet etching. Finally, the sample was annealed at 400 oC in H2 ambient for 30 minutes. The highest temperature of the fabrication processes was 550 oC. The devices were designed with the width and length of channel of W = 10 µm and L = 10 µm, respectively. Figure 1 shows microphotograph of poly Si film and schematic of TFT designed mask. This result reveals that poly-Si film was periodic in 200 µm and the channels were fabricated parallel with scanning direction in 10 groups at different positions. In particular, TFTs of group 1 were fabricated along heavy-void regions and distance of two consecutive groups was 20 µm in perpendicular direction of laser scan. Figure 2 shows an EBSD mapping of the laser-crystallized poly-Si films. It was found that (100) Si crystal grains with an average size of 20 µm x 2 µm were formed. In this figure, crystal orientation of the poly-Si film was different from the middle to the side of the measured region. As result, characteristics of TFTs was relatively different in each group. Table I indicates average mobility, maximum mobility, and variation of TFTs in 10 groups. TFTs with ultrahigh electron field effect mobility (µFE ) of over 1000 cm2/Vs in a linear region was realized. A high average electron field effect mobility of 636 cm2/Vs and its low variation of 25% were achieved in group 7 in which (100) Si crystal grains were dominant. Figure 3 shows IDS-VGS characteristics of poly Si TFTs in group 7. A high off-leakage current and its high variation of 10-10 – 10-6 were observed owing to trap states in both the grain boundaries and crystal grains. Table I.Average mobility of TFTs and their variation in each group Group Average mobility (cm2/Vs) Maximum mobility (cm2/Vs) Standard deviation (cm2/Vs) 1 2 3 4 5 6 7 8 9 10 270 490 453 476 510 590 636 600 632 618 512 1010 780 717 697 873 971 940 973 808 114 264 131 148 79 167 159 194 183 118 Figure 1

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