Characterization and Optimization of Seals-Off for Very Low Pressure Sensors (VLPS) Fabricated by CMOS MEMS Process

Abstract

In the world of MEMS processing today, fabrications of membrane are performed using bulk micromachining (BMM). However these techniques not easiest to integrate with CMOS standard process due to not compatible of the processing flow. An attractive alternative deployment of surface micromachining (SMM). There is a trend to use surface micromachining to their advantage of simplicity in design and fabrication process compatibility. This paper presents process development of thin layer membrane for very low capacitive pressure sensor application. The structure of the membrane consists of parallel plate which both top and bottom electrodes were fixed at both sides. Utilizing CMOS MEMS process compatible fabrication of the thin layer membrane involved in three stages; i) hole opening etch, ii) sacrificial intermediate oxide release etch and iii) closing of etch holes. Therefore seals-off process characterization and optimization experiment are presented in this paper, will spur advancement in the development of a CMOS MEMS product for very low capacitive pressure sensor.