Characterization and Experimental Assessment of the Effects of Parasitic Elements on the MOSFET Switching Performance

This paper presents a novel rectifying circuit that aims to reduce power losses of Supercapacitor voltage equalizer in urban rail. High-efficiency is achieved by designing a synchronous rectifier with MOSFET instead of diode and chiefly by optimizing MOSFET switching performance. A switching model that takes MOSFET parasitic capacitances and inductances, circuit stray inductances, and reverse current of parasitic diode into consideration is given to analyze the MOSFET switching characteristics. Furthermore, major power losses during MOSFET working including the moment of switching and the state of conduction are calculated. In order to reduce power losses, precise Zero Current Detection (ZCD) is applied. Meanwhile, blanking time is set to avoid the MOSFET accidentally switching. The operational principles of the proposed synchronous rectifier are presented, and high-efficiency is verified by the experimental results in a supercapacitor voltage equalizer experimental system with eight series-connected supercapacitors cell.

At 13.56MHz, the inverter is strongly affected by parasitic elements. The print circuit board (PCB) design is very critical because it control the parasitic elements on the circuit. This paper analyzes the effect of parasitic elements on switching performance of MOSFETs in 13.56MHz class D inverter. This work also proposes an improved PCB design which can provide a 23.4% decrease in parasitic inductance comparing with conventional PCB design.

Theory and experiment of a spherical probe-fed conformal antenna with a parasitic element mounted on a spherical multilayer structure are presented in this paper. Linear Rao-Wilton-Glisson (RWG) triangular basis functions are applied in MPIE formulation. Current distributions on coaxial probe and conformal radiating elements are computed by using spatial domain Dyadic Green's Function (DGF) and its asymptotic approximation. A prototype of such an antenna is fabricated and tested. The effect of the parasitic element on the input impedance and radiation patterns of the antenna is investigated. It is shown that the antenna characteristics are improved significantly with the presence of the conducting parasitic element. Good agreement is achieved between the results obtained from the proposed methods and the measurement results.

This paper presents an investigation into the effects of the gate drive resistance on the losses of the MOSFET–snubber–diode (MSD) configuration commonly used in many power converters. An analytical loss model that takes the circuit stray inductances, MOSFET parasitic capacitances and inductances, and reverse current characteristic of the freewheeling diode into consideration is derived to describe the interactions among the MOSFET, snubber, and freewheeling diode during the switching transients. Two possible turn-ON switching situations, determined by the gate drive part and the power part, respectively, are distinguished in the analysis. It is then used to study the effects of the stray inductances, gate drive resistance and snubber on the switching behaviors, power loss distribution, and voltage stress on the MOSFET in the entire MSD configuration. A sequence of steps will be given to illustrate how an optimal combination of the gate drive resistance and snubber capacitance is determined, in order to minimize the overall loss of the MSD configuration for a maximum permissible voltage stress on the MOSFET. The loss model and method of determining the gate drive resistance and snubber capacitance are evaluated by comparing the theoretical predictions with the experimental results of a 400V, 6A test bench. The performances of the MSD configuration with different types of freewheeling diodes will be studied.

DC-DC converter circuits are used in many electronic devices to adjust the voltage to a certain level such as Electric Vehicle. DC-DC Buck converters, which are the most used type of DC-DC converters, reduce the input voltage and keep the output voltage constant at a desired reference voltage value. In this study, the effect of parasitic elements in Buck DC-DC converters is examined on the PID controllers. Parasitic elements cause a non-linear effect on the Buck converter system model. Studies in the literature generally control the output voltage by designing controllers on the Buck converter model without parasitic elements. Alternatively, linear controllers such as PID are designed according to the linearizing model, taking into account the effect of parasitic elements. In addition, nonlinear controllers are designed on the full model with the effect of parasitic elements. In this study, the effect of parasitic elements on linear controllers, especially PID, is examined.

Energy capacity of a voltage-dependent capacitor is investigated and defined. An equation for the calculation of energy capacity of the MOSFET's parasitic capacitance is formulated. The defined energy capacity of a voltage-dependent capacitor can be used to calculate switching losses of resonant switches by simply calculating the energy flow into or out of the MOSFET. Computer simulations are used to verify the validity of the formulas. The discrepancy between energy capacity of the MOSFET's parasitic capacitance calculated from the formulated equation and that calculated from the results of computer simulation are negligible. Computer simulation is also used to validate the proposed switching-loss calculation technique.

Parasitic elements and mutual couplings of SiC half-bridge modules strongly affect the switching characteristics of devices. They excite overshoots and oscillations that further contribute to increased EMI emissions. This paper will explain and analyze such effects on the switching performance and EMI emissions, based on 3D FEM models of the module. It can be said that knowledge about the effects of parasitic elements and mutual couplings on the switching behavior is an important basis for the design guidelines of fast switching wide-bandgap (WBG) power converters. A three-phase DC-AC inverter prototype with three SiC half-bridge MOSFET modules and an EMI measurement test setup are constructed for the experiments. The experiments results are validated with simulation results.

Silicon carbide (SiC) MOSFETs have been widely studied in high frequency applications. The switching performance, however, is limited with the existence of the parasitic elements. One critical issue is the susceptibility of the gate-source voltage to the parasitic elements, rendering the possibility of spurious operation of the SiC MOSFETs. This paper conducts comprehensive investigations on the impact of parasitic elements on the gate-source voltage of the SiC MOSFET at switch turn-on and turn-off. It is found inappropriate circuit design can cause aggravation of the oscillations of the gate-source voltage of the SiC MOSFET, further leading to the occurrence of unintended switching events. Equivalent circuit models are utilized to study the oscillations in the gate-loop. The effects of parasitic elements on the gate-loop stability are studied through PSpice simulation and experiments. Based on the results, piratical suggestions on the circuit design and control are made to designers.

This paper presents an investigation into the effects of the gate drive resistance on the losses of the MOSFET-snubber-diode (MSD) configuration commonly found in a power converter. An analytical loss model that takes the circuit stray inductances, MOSFET parasitic capacitances, and reverse-recovery characteristic of the freewheeling diode into consideration is derived to describe the interaction among the MOSFET, snubber and freewheeling diode during switching transitions. It is then used to study the effects of the circuit stray inductances, gate drive resistance and snubber on affecting the switching behavior, power loss distribution in the entire MSD configuration and voltage stress on the MOSFET. A sequence of steps will be given to illustrate how an optimal value of the gate drive resistance is determined, in order to minimize the overall loss of the MSD configuration for a maximum permissible voltage stress on the MOSFET. The loss model and method of determining the gate drive resistance are evaluated by comparing the theoretical predictions with the experimental results of a 1kW, 230V, 50/60Hz boost-type power factor corrector. The performances of the MSD configuration with different types and brands of MOSFETs and freewheeling diodes will be studied.

Using parasitic elements in different configurations, many parameters of an antenna can be modified. Most of these approaches were found to alter the fundamental characteristics such as input impedance, gain, polarization and radiation pattern of an antenna. Array antennas with high gain comprise of complex feed distribution which is a major hurdle design at higher microwave frequencies. Using parasitic elements show promise in addressing the complexity of amplitude and phase distribution in a very large array. Simulated results during research using parasitic elements with a dipole has shown promise in achieving desired radiation pattern characteristics without employing a complex feed network. The gain and beamwidth are both optimized to obtain the desired solution for a narrow beam high gain antenna providing high isolation when used in a bistatic configuration. The effect of parasitic elements on a dipole in relation to gain is also discussed; based on which an analytical model is proposed for the design in X-Band.

The effects of parasitic elements on the voltage standing wave ratios (VSWR's) of two antennas are investigated. First, a parasitic monopole is used for a normal-mode helical antenna. The VSWR investigation shows that dual-frequency operation is obtained by the parasitic element effects. The dual-frequency operation is revealed as a function of monopole position above a ground plane (monopole height). As the monopole height decreases, the separation of a higher resonance frequency f/sub H/ from a lower resonance frequency f/sub L/ increases. For a monopole length of L/sub MP//spl ap/0.4/spl lambda//sub HX/, where /spl lambda//sub HX/ is the resonance wavelength of the helix, the frequency bandwidth for a VSWR=2 criterion is 12.5% in the lower frequency f/sub L/ region and 5.2% in the higher frequency f/sub H/ region, with a frequency separation ratio of f/sub H//f/sub L/=2.14. Secondly, L-figured parasitic elements are used for an inverted-F antenna (IFA). The parasitic elements improve the VSWR performance. The frequency bandwidth for a VSWR=2 criterion is approximately two times as wide as that of the single IFA. It is also found that bending the horizontal sections of the IFA and parasitic elements contributes to reducing the antenna size while not significantly deteriorating the VSWR bandwidth. The radiation patterns are also presented and discussed.

The meaning of the term high frequency switching as related to a synchronous buck converter applications depends on the power range, the step in the voltage conversion and the switching performance of MOSFETs used as power switches. In a power range of 1 W, and low input voltages, a switching frequency up to 10 MHz can be reasonably achieved. In contrast, switching 20 A from Vin of 12 V down to 1.2 V at a frequency of 2 MHz is a big hurdle if an efficiency close to 90% is expected. Switching power loss increases with output current and input voltage level, and is proportional to switching frequency. Respectively, novel, fast switching MOSFETs have to be used. On the other hand, 2 MHz frequency means a period of 500 ns only. If a duty cycle of 10% is required, the whole on-cycle has to be accomplished within 50 ns. This requires very effective and fast gate voltage control.KeywordsPower LossBreakdown VoltageBuck ConverterTotal Power LossHigh Frequency SwitchingThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

In recent, high frequency power converters are more popular due to extensive use in electric vehicle and micro grid applications. In high frequency power converters PCB designing is an important part of the circuit designing specially for high-frequency operation. In all power electronics systems, PCB is used for compact circuits but the effect of parasitic elements in the PCB is usually neglected. While designing the gate driver circuit for high-frequency operation devices requires proper characterization of the PCB parasitic element along with the other resistive and capacitive elements used. Even in lower frequencies if the parasitic elements not considered creates ripples in the output. The paper presents a detailed pole-zero analysis of a simple gate driver circuit and the effect of different frequency operations on the same design to represent the need for different values of external resistor and capacitor to get the best voltage waveform to feed the gate terminal of the power device.

In the proposed study, MOSFET device used in buck-boost converter for PV systems is studied. The parameter of MOSFET Rds(on) is varied and its effect on output voltage is studied. The parasitic elements in inductor and capacitor such as resistance on buck-boost converter performance are studied. From the proposed study it has been found that the effect of parasitic resistance in capacitor is less as compared to parasitic resistance effect of inductor. Also the proposed study gives better insight into parasitic effect of Printed Circuit Board and losses incurred due to the same. In PV systems buck-boost converter is used to convert solar energy to electrical energy which is then stored in battery to drive the loads. These parasitic elements will have considerable effect on the performance of buck-boost converter such as efficiency and output voltage as validated by experimental results. DOI: http://dx.doi.org/10.11591/ijece.v4i6.6855

This paper derives an improved analytical model to estimate switching loss and analyze the effects of parasitic elements on the switching performance of SiC MOSFETs. The proposed analytical model considers the parasitic inductances, the nonlinearity of the junction capacitances and the nonlinearity of the trans-conductance. The turn-on process and the turn-off process are illustrated in detail, and equivalent circuits are derived and solved for each switching transition. The proposed analytical model is more accurate and matches better with experimental results than other analytical models. Note that switching losses calculated based on experiments are imprecise, because the energy of the junction capacitances is not properly disposed. Finally, the proposed analytical model is utilized to account for the effects of parasitic elements on the switching performance of a SiC MOSFET, and the circuit design rules for high frequency circuits are given.