Abstract
A new antifuse device with a planar metal/dielectric/poly-Si1-x Ge x /dielectric/ metal structure has been proposed for use in FPGAs (field programmable gate arrays) as a voltage programmable link. The programming process is believed to proceed in four steps such as dielectric breakdown, double injection process, filament formation and filament enlargement. The maximum power of 38 mW is dissipated when a conductive filament is formed through the poly-Si1-x Ge x , and the velocity of filament formation is about 16 cm/s when 12.5 V is applied to the device. The device shows low leakage current (~ 0.01pA/antifuse) at the operating voltage of 5 V and low on-resistance (~ 13-15 Ω) at a 1ms-long 12.5 V pulse.
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