Abstract

* Abstract - A circuit model for a jeld emission triode has been proposed. The model parameters have been extractedfiom the fabricated silicon tip array and verijied by comparing with the results simulated by circuit simulator (SPICE). The cut-oflfiequency can be calculated Pom the parametric capacitance and the transconductance values extracted. For the Jield emission triode, the capacitance of 3.45 JF/@ and the transconductance of 0.94 nYtip have been measured under the emission current of 4.1 nA/tip. From these values, the cut-off frequency is predicted to be 43 kHz but the measured one came out to be 6 kHz because of the parasitic capacitance components. I. Introduction. A field emitter array as an electron source may become available by combining the micro-fabrication techniques with the superiority of vacuum as a transport medium. A number of researches have been carried out on the fabrication and the DC test of field emission triodes. However it is also important to analyze the AC characteristics of them for the applications including field emission display and RF power amplifier(l). From that analysis, various characteristics of the field emission triodes such as optimal operating point, transient state response, delay, frequency response, and input/output current can be predicted. In this paper, a circuit model of the field emission triode is proposed and the numerical values of parameters related to the model are extracted. The values of these parameters can be estimated analogically from the MOSFET model. In this model, field emission parameters are strongly dependent on the structure of the field emission triode and the work function of the tip material because the electron transport in the vacuum device is ballistic. The fabrication process of silicon field emitter array, which is used for the field emission triode modeling, is based on isotropic silicon dry etching, tip-sharpening oxidation, and nitride side-wall masking oxidation(2). The fabricated field emission triode has physical parameters of 1 pm oxide isolation layer thickness, 1.6 p gate hole diameter, and 1.5 mm distance between the gate and the anode. 11. Circuit modeling of a field emission triode. The model parameters superimposed on the basic structure of a field emission triode are shown in figure 1. In the notations, T means the internal node supposed to locate at the tip acme point. The RG and RC represent the line resistances of the gate and the cathode, respectively. The resistance RGC represents the leakage current through the thermally grown silicon dioxide layer isolating the gate from the cathode. The resistance of silicon tip, Rtip can be approximated by equation (l), if the silicon tip is assumed to be a truncated cone.

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