Abstract
We report an experimental study of interface silicon trivalent defects on (100) oriented MOS structures. Considering the surface potential fluctuations, high-temperature conductance spectroscopy is used to detect acceptor and donor trap energy levels on N- and P-type devices, respectively, and to measure their capture cross-sections. The trap levels values are confirmed by a UV-assisted capacitance analysis. The capture cross-sections show very good agreement with published data deduced from different experimental methods. Our results confirm the capability of high-temperature conductance spectroscopy for interface defects characterisation.
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