Abstract
Abstract The goal of this chapter is to analyze the problems in the modeling and design of passive components at increased frequencies up 100 GHz. It starts with a short review on the state of the silicon technology, employed materials, techniques, and the chip architectures. Transmission lines, integrated components, packaging issues and three-dimensional integration are analyzed and discussed. The chapter also includes EM modeling of modified low-loss interconnects and via-holes for high-speed applications.
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