Abstract

This chapter focuses on the EXPRESSION architecture description language (ADL) and its associated design automation methodologies. EXPRESSION is used for modeling, software toolkit generation, rapid prototyping, design space exploration, and functional verification of System-on-Chip (SOC) architectures and it was developed at the University of California, Irvine. It follows a mixed-level approach where it captures both the structure and behavior that supports a natural specification of the programmable architectures consisting of processor cores, coprocessors, and memories. The powerful constructs in EXPRESSION allow specification of a wide variety of processor, coprocessor, and memory architectures. Automatic generation of a compiler and simulator enables fast and efficient design space exploration of architectures. The elegant formalism in EXPRESSION also enables top-down validation of complex architectures to complement existing bottom-up verification techniques. It is successfully used for specifying various architectures and can perform early exploration, rapid prototyping, and functional verification of programmable SOC architectures.

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