Chapter 5 Week 2 Class 2

Abstract

Lecture on SerDes Topics: Serial vs. parallel data transfer, PCI Express, PLL functionality. Serializer-Deserializer and PLL design. Summary: We introduce our class project, a full-duplex serializer-deserializer (serdes) with a discussion of serial bus transfer advantages and the performance specifications of a PCI Express serdes lane. We then look at the serializer and deserializer ends of a serdes on a block level. We also see how a PLL works on a block level. We decide to start our project by designing and implementing the PLL which will be instantiated at each end of each serial line. PLL Clock Lab 6 After designing and testing a digital PLL, we sketch out and simulate a preliminary, generic parallel-serial converter. We finish with a parallel-to-parallel frame encoder which could be used to prepare data for serialization. Lab Postmortem We discuss simulator time resolution and digital formats, comparator features, and our choice of frame encoding.