Chapter 2 - RISC: Effective Architectures for VLSI Computers

Abstract

Advances in very large scale integrated (VLSI) technology have made it possible to realize the functionality of a super-minicomputer on just a few silicon chips. However, this new implementation has constraints that are quite different from those of the main-frame technology. To obtain the maximum performance from a given chip size and power budget, an objective analysis has to be made about the most important requirements of the intended application of the computer. The most often performed operations should be supported by hardware, but only to the extent that the overall performance of the complete computer system actually increases. Giving more hardware support and, thus, more chip area and power to one function invariably takes resources away from other functions. It is the task of the system's designers to analyze these trade-offs over several levels, including circuit design, micro architecture, and instruction set design, to find the optimum solution. This chapter describes such an analysis and the chosen solution for the implementation of a single-chip processor for the languages C and Pascal by executing a job mix as might be found in an academic computer science department.