Abstract

This chapter reviews the dramatic improvements in microelectronics performance over that past few decades that have been accompanied by a severe reduction in the size of memory and logic devices. This scaling required drastic decreases of the SiO2 dielectric film thickness to achieve ever-higher capacitance densities. Fundamental limits of SiO2 as a dielectric material, imposed by electron tunneling, reach SiO2 film thickness approaches ∼1 nm. High-κ interlayer dielectric material needs to replace SiO2 as a capacitor and gate dielectric material. Numerous alternate high-κ materials are being actively investigated, ranging from Al2O3 (k∼9) to perovskites (κ∼102–104), and achieves very high capacitance densities with relatively thick films. The thicker films preclude the excessive tunneling currents observed for very thin SiO2 films. Finding a high-κ material is a major challenge because the high-κ materials have a high resistivity, and act as a good barrier layer, which is thermally stable, and form an ideal interface with silicon. SiO2 films can be conveniently formed via oxidation of the silicon substrate. Alternate high-κ materials must be formed by deposition. Atomic layer deposition (ALD) is a promising technique for depositing alternate high-κ thin films for the microelectronics industry. ALD is also very well suited for depositing various types of composites that combine the desirable properties of different materials.

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