Abstract
This study demonstrates the presence of chaotic oscillations in standard CMOS circuits. At radio-frequencies, ordinary digital circuits can show unexpected nonlinear responses. We examine a CMOS inverter coupled with electrostatic discharging (ESD) protection circuits, designed with 0.35 $\mu$ m CMOS technology, for evidence of its chaotic oscillations. As the circuit is directly driven by a radio-frequency signal, the circuit enters a chaotic dynamic regime when the input frequency is higher than the maximum operating frequency of CMOS inverter. We observe an aperiodic signal, a broadband spectrum, and a complex spectrum. We discuss the nonlinear physical effects in the given circuit: ESD diode rectification, dc bias shift due to a nonquasi-static regime operation of the ESD PN-junction diode, and a nonlinear resonant feedback current path. In order to predict these chaotic dynamics, we develop a transistor-based model, and compare it with the experimental results. To verify the presence of chaotic oscillations mathematically, we develop an ordinary differential equation model with the circuit-related nonlinearities. The largest Lyapunov exponents are calculated to verify the chaotic oscillations. The importance of this study derives from investigating chaotic oscillations in standard CMOS circuits as circuit-effects due to high-intensity electromagnetic signals.
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More From: IEEE Transactions on Electromagnetic Compatibility
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