Abstract

Boron transient enhanced diffusion (TED) causes reverse short channel effect, and threshold voltage (Vt) increases abnormally, which seriously affects the device performance and yield. The Vt increment is different with different channel size. To investigate channel impurity distribution and the influence of channel size on TED, Vt adjustment ion-implantation, LDD ion-implantation and carbon co-implantation experiments were performed on 40 nm CMOS process, measuring Vt with different channel size and process, and using TCAD tools for process simulation. Experiments results show that Vt rises first with channel length decreasing and then drops sharply after reaching the maximum at 0.55 μm. The Vt -L curve slope decreases when channel width decreases. Vt decreases with channel width and it is decreasing faster and faster when channel length is constant. The interstitial Si atoms are injected by LDD ion-implantation and diffuse into channel, while boron pile up at the LDD-channel boundary. However, boron leak into the shallow trench isolation (STI) area at the corner formed by LDD and channel. Both pile-up and leakage control boron concentration distribution in channel. The Vt shift induced by boron TED is channel size-dependent, and high energy carbon co-implantation and infrared rapid thermal anneal can suppress TED effect effectively.

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