Channel Hot Carriers and Other Reliability Mechanisms

Abstract

AbstractThe first part of this Chapter is devoted to a general study of CHC degradation in pMOSFETs, which is relevant for novel Ge-based devices but suffers of a lack of literature due to the reduced relevance in standard Si technologies. First, an experimental methodology to study the interplay of HC and NBTI is discussed. The study is performed firstly on standard Si/SiON/poly-Si devices and then validated on a more recent high-k/metal gate technology. The learning is consequently used for interpreting the experimental observation on the novel SiGe pMOSFETs. Next, the HC degradation in pure Ge channel devices is investigated, with particular focus on the junction engineering which is expected to have an impact on the device reliability. The second part of this Chapter briefly discusses the impact of other reliability mechanisms, namely 1/f noise and Time Dependent Dielectric Breakdown (TDDB), on (Si)Ge channel devices as compared to standard Si reference.KeywordsCharge PumpNegative Bias Temperature InstabilityStress VoltageDrain SideElectric Field ProfileThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.