Channel Engineering of Normally-OFF AlGaN/GaN MOS-HEMTs by Atomic Layer Etching and High-$\kappa$ Dielectric

Abstract

In this letter, normally-OFF AlGaN/GaN metal–oxide–semiconductor high-electron-mobility transistors with a threshold voltage of 2.2 V have been achieved by an atomic layer etching technique. Combined with surface passivation by atomic layer deposition of composite HfSiO high- $\kappa $ gate dielectric, a well-controlled gate-recess process with minimized surface damage results in improved interface properties with a low interface trap density of $2.8\times 10^{11}$ eV−1cm−2 and suppressed gate leakage current with a high current on/off ratio over 1011. A maximum current density of 518 mA/mm with an ON-resistance of 10.1 $\Omega \cdot \textsf {mm}$ and a high breakdown voltage of 1456 V at an OFF-state current density of $1~\mu \text{A}$ /mm are also achieved. In the meantime, the dynamic ${\text {R}}_{\mathrm {on}}$ is only 1.2 times the static ${\text {R}}_{\mathrm {on}}$ after OFF-state drain voltage stress of 120 V and 2.6 times after 300-V stress.