Abstract

Creep corrosion is the corrosion of the copper (and sometimes silver) metallization on PCBs and the creeping of the corrosion product (mostly sulfides of copper and sometimes silver) on the board surfaces which may lead to the electrically shorting of neighboring features on PCBs. The problem of creep corrosion has been largely brought under control by selecting finishes, by trial and error, that have less propensity to creep corrosion. But the challenge of a reliable qualification test for creep corrosion remains, though some progress has been made developing the mixed flowing gas (MFG), the Chavant clay and the flowers of sulfur tests. The iNEMI (International Electronics Manufacturing Initiative) technical project team on creep corrosion is developing a flowers-of-sulfur (FOS) based qualification test for creep corrosion on printed-circuit boards (PCBs). The test setup consists of a 300-mm cube chamber with two means of mounting the test specimens and flowing air over them to expose them to constant, predefined humidity and temperature conditions and sulfur and other contaminants. The FOS chamber performance has been evaluated using copper and silver foils and preliminary test runs have been conducted on PCBs from a manufacturing lot known to have failed in service. The effect of air velocity on the copper and silver corrosion rates was quite linear. The effect of humidity on copper and silver corrosion rates in the low air velocity range of less than 0.1 m/s showed a strong dependence on relative humidity. In the high velocity range of 1 m/s, there was no clear dependence of humidity on copper and silver corrosion rates. A means has been developed for applying controlled concentration of ionic contamination on selected local areas of test PCBs. Preliminary test runs have shown that ionic contamination found in fine dust may be a necessary condition for copper creep corrosion. The focus of this paper is the design of a FOS chamber and its performance evaluation using copper and silver foils and the preliminary testing of the procedure using PCBs from a manufacturing lot known to have failed in service.

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