Challenges in chip design for the AGIPD detector

Abstract

Adaptive Gain Integrating Pixel Detector (AGIPD) is currently under development for the European X-ray Free Electron Laser (XFEL). It is a hybrid pixel detector with a specifically developed readout chip bump bonded to a silicon sensor. The chip is being designed in IBM 0.13 μ m CMOS technology. This paper is focused on the readout chip design. The main challenges for this chip are: the high dynamic range ( 1 – 1.4 × 10 4 ) with single photon sensitivity, the long storage chain ( ≥ 200 ) with a long hold time (99 ms), and the high radiation dose (up to 100 MGy). A charge integrating amplifier with a gain adaptive to the number of incoming photons is combined with a correlated double sampling (CDS) buffer to achieve the required dynamic range and single photon sensitivity. Several techniques are implemented in the storage cell design in order to reduce leakage current and signal-dependent charge injection. Four prototype chips have been designed for testing the performance of the implemented switches, capacitors, amplifiers, storage cells and periphery circuitry. The recently submitted test chip has a 16×16 pixel matrix, 100 storage cells in each pixel and a periphery circuitry for accessing and controlling the pixels and storage cells.