Abstract

The process scaling as well as the multi-level cell technology greatly increase the storage density of NAND flash memory. Unfortunately, the high-density flash memory suffers from severe noise such that its performance will be dramatically deteriorated. In this letter, we propose a cell-state-distribution-assisted threshold voltage detection (CSD-TVD) to optimize read reference voltages. Specifically, the proposed detection method exploits the variation of a number of cells within each sub-window of the overlap region to detect the voltage shift and analyze its distribution. Afterward, the mean of the voltage-shift distribution is viewed as the optimal voltage shift, which is used to boost the accuracy of the read reference voltage. Based on the retention characteristics, we also conceive a novel low-latency (LL) CSD-TVD to reduce the detection range of the CSD-TVD. The experimental results demonstrate that the proposed CSD-TVD and LL-CSD-TVD achieve better error performance than the state-of-the-art retention-optimized-reading (ROR) and nonuniform detection methods. In addition, the LL-CSD-TVD significantly reduces the read latency with respect to the CSD-TVD and ROR.

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