Abstract

As the industry transitions to the 45 nm node and beyond, requirements for critical dimension (CD) control are getting extremely aggressive. Current 45 nm node specifications call for 2 nm or better CD uniformity (CDU) on the gate level. For critical dimension control in this regime all measurable process effects must be closely monitored and controlled. This includes such effects as etch uniformity, scanner dose and focus consistency, post-exposure bake (PEB) plate uniformity, and incoming wafer variation such as wafer warpage. The problem is that as the number of significant contributors to CDU continues to increase; the number of parameters that can be used to control CDU has not. To better understand how to achieve these increasingly stringent CDU targets, the authors have explored how exposure and resist processing effects CD control. The goal of this work is to simulate how process parameters such as dose and PEB temperature can be used to effectively control CD, while minimizing unintended negative effects on thru pitch CD performance, MEEF, and other lithography process metrics. In addition to traditional lithography metrics, the effect these process changes have on CDU is simulated using a Monte Carlo technique.

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