Abstract
A novel implementation of Inter process communication in CDMA NOC is proposed. In this study, the orthogonality properties of a Walsh code are used to route data packets between the IP-Cores.The asynchronous circuit design with combinational logic (Gate level design) is used for transmission and receiving circuits, along with ip-cores and reduces the processing time and resource utilization. The use of asynchronous pipelined core design process increases the operating frequency as well. The data transfers over IP-Core based interconnect is implemented on gate level. The latency and throughput values are obtained for variable payload size. The performance of asynchronous and synchronous communication are measured and analyzed.
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