Abstract

A cascaded multicore vapor chamber (CMVC) is designed for dissipating heat from high-flux hotspots simultaneously with a high-total-power background. Current thermal management strategies rely on spreading high local heat fluxes by conduction in the lid of electronics packages. Embedding vapor chambers (VCs) within the lid is an attractive option to directly address intrapackage hotspots. We investigate the design of intralid VCs, for a generic device having a total heat load of 476 W having a background heat flux of 0.75 W/mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , with hotspots of 8 W/mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> over a 1-mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> area. A conventional VC design, having a single vapor core, will require a thick evaporator wick to avoid the capillary limit for large total power. The necessity for a thick wick then imposes a large thermal conduction resistance when the VC is exposed to high heat flux hotspots. The proposed CMVC architecture aims to address this limitation. The cascaded architecture comprises a bottom-tier VC having an array of multiple small vapor cores for spreading heat from the small hotspots. These small vapor cores have short paths of liquid return to the evaporator, such that they can handle their footprint heat load while using thin wicks, resulting in a low hotspot thermal resistance. Furthermore, local dampening of the hotspots by the bottom tier then reduces the thermal conduction resistance across the necessarily thick wick in the top tier. Hence, the cascaded architecture has the potential to significantly reduce the overall thermal resistance, relative to a single tier. To substantiate this design rationale, experiments are performed to illustrate that the resistance of a commercial VC can be significantly reduced by interfacing the heat source with an intermediate heat spreader. Reduced-order models are then used to understand the effect of the wick properties (porosity and particle size) and geometric parameters on the thermal performance of the CMVC for the representative power map. The optimal CMVC design offers a thermal resistance (0.66 K/W) that is significantly lower compared to a conventional single-core VC (1.76 K/W) owing to a reduction in the conduction resistances across the internal wicks. That parametric optimization results demonstrate that the thermal resistance of the CMVC is more sensitive to the wick porosity compared to the particle diameter. Furthermore, there exists a wide range of wick properties and vapor core sizes for which near-optimum thermal performance can be attained, which is particularly attractive from the standpoint of flexibility in design and manufacturing.

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