Carleman Linearization approach for Output Voltage Prediction of a CMOS Inverter

Abstract

CMOS inverter is the nucleus of all digital designs and the most widely used MOSFET inverters. With developing technologies, the size of integrated circuits is reducing which leads to low power operation of CMOS inverter and that makes noise consequential resulting in non-deterministic behavior. For performing noise analysis of CMOS inverter, a nonlinear stochastic model i.e., the first-order non-linear differential equation is taken into consideration. To deal with nonlinear SDE, a novel approach of Carleman linearization embedded with Itô calculus is used in this paper that transforms finite-dimensional nonlinear SDEs into infinite-dimensional bilinear SDEs. Carleman linearization is used as it preserves the nonlinearity and adopts the nonlinearity as the states of the augmented vector. Further, Carleman linearization-based prediction framework is proposed for the estimation of output voltage of stochastic CMOS inverter model. The numerical simulations along with the theoretical results feature the superiority of the proposed Carleman linearization-based prediction approach contrasts with the benchmark EKF-based prediction approach.