Carbon nanotube, graphene and atomic wires as next generation interconnects

Abstract

Carbon based metal wires such as carbon nanotube (CNT) and graphene nano ribbon (GNR) attracted much attention for possible applications as future interconnects. In particular, both CNTs and GNRs have long electron mean free path (~ µ), high carrier mobility (105 cm2/V s) and excellent mechanical (tensile strength ~ 100 GPa) and high thermal conductivities (300 W/m K) and have shown great promise for integration with existing CMOS technology. The current carrying capacity of both CNT and GNR are remarkable: (1010 A/cm2) about four orders of magnitude higher than copper even at ~1nm diameter. While both CNT and GNR share some common functionality such as high current carrying capacity they have their own advantages and disadvantages. For example, while CNT could be relatively produced in bulk quantities particularly using CVD and chemical route while large scale production of GNR is still not possible. In contrast, due to planar nature GNR could be produced using lithography techniques down to 10's of nm.In addition to pristine carbon based conductors, functionalized CNT and GNR provide a new and interesting approach to enhance their electrical performance. Metal decorated CNT, metal intercalated GNR and/or chemically functionalized carbon based wires are few examples. These solutions are new class of examples that may provide superior performance and could integrate into existing CMOS technology better.In spite of these promises, there are many challenges remain before either of these new solutions become viable. These problems arise from intrinsic nature of size effect: effects such as discrete energy levels, modified e-ph coupling becomes severe at nanoscale and these issues appear (or will appear) in all the emerging interconnect solutions e. g. CNT, GNR, single crystal metallic wires (atomic wires) including copper at nanoscale. Carrier at nanoscale other wisely known as quantum transport -- both theoretical and experimental are beginning to provide answers to some of these questions but much more work needed in these directions. For example, (1) how both static and dynamic resistances change from pristine (suspended) wires to when deposited on dielectrics (2) how different dielectrics affect wire's electrical characteristics (e. g. RC delay etc) (3) what kind of bonding and stability wires have with underlying substrate (4) which of the two (CNT vs GNR vs atomic wires) have superior performance as interconnects when deposited in dielectrics. (5) what kind of power requirement one needs to meet? (6) what type of packaging and thermal constraints one have to deal with?These issues need to be addressed in a fundamental and predictive way: indeed combining large scale simulations with compact and circuit level modeling in combination with state of the experiments may provide much needed pathway for next generation interconnects.