Capacity planning for semiconductor wafer fabrication with time constraints between operations

Abstract

Planning capacity for wafer fabrication is complicated by time constraints between process steps. For example, if certain baking operations are not started within two hours of a prior cleaning then the lot in question must be sent back to be cleaned again. For two-element systems, an approximation based on M/M/c queuing formulas is developed and compared with results from discrete event simulations. The approximation performs well in predicting the probability of reprocessing and provides a bound that can easily be included in the spreadsheet capacity models which are often employed by manufacturers. For multi-element systems, the results of a fluid model used to understand general system characteristics are summarized. Discrete event simulation was used to validate the results of the analytic models and to provide guidelines for operating time-constrained systems.