Abstract
A new frequency compensation scheme for multistage amplifier, named capacitor-multiplier frequency compensation (CMFC), is introduced. Increasing the capacitance with a current-mode multiplier in CMFC amplifier allows the circuit to occupy less silicon area and to drive large capacitive loads more effectively. Moreover, smaller physical capacitance results in higher gain-bandwidth product (GBW) and improved transient responses. Furthermore, the capacitor- multiplier stage (CMS) embedded in CMFC creates a left-half-plane (LHP) zero, which boosts the phase margin and enhances the stability of the amplifier. Implemented in a commercial 0.5 mum CMOS technology and driving 500 pF capacitive load, a three-stage CMFC amplifier achieves over 100 dB gain, 3.45 MHz GBW and 1.62 V/muS average slew rate, while only dissipating 200 muW under 2V supply.
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