Capacitance voltage curve simulations for different passivation parameters of dielectric layers on silicon

Abstract

Surface passivation is a widely used technique to reduce the recombination losses at the semiconductor surface. The passivating layer performance can be mainly characterized by two parameters: The fixed charge density (Qox) and the interface trap density (Dit) which can be extracted from Capacitance-Voltage measurements (CV). In this paper, simulations of High-Frequency Capacitance-Voltage (HF-CV) curves were developed using simulated passivation parameters in order to examine the reliability of measured results. The Dit was modelled by two different sets of functions: First, the sum of Gaussian functions representing different dangling bond types and exponential tails for strained bonds. Second, a simpler U-shape model represented by the sum of exponential tails and a constant value function was employed. These simulations were validated using experimental measurements of a reference sample based on silicon dioxide on crystalline silicon (SiO2/c-Si). Additionally, a fitting process of HF-CV curves was proposed using the simple U-shape Dit model. A relative error of less than 0.4% was found comparing the average values between the approximated and the experimentally extracted Dit’s. The constant function of the approximated Dit represents an average of the experimentally extracted Dit for values around the midgap energy where the recombination efficiency is highest.