Abstract
This letter has developed a procedure for quantitatively evaluating the electrical levels at a (110)∕(100) interfacial grain boundary (GB) in p-type direct silicon bonded wafers by combining current-/capacitance-voltage (I-V,C-V) and capacitance transient techniques. It is found that GB states can be positively charged and induce a high potential barrier. The local distribution of charge density deduced from I-V∕C-V measurements shows that the state density is constant, ∼2×1012cm−2, in the energy range Ev+0.36–0.50eV. Meanwhile, capacitance transient technique reveals the states in the energy range Ev+0.33–0.43eV with capture cross sections of 10−17cm2, and the state density is consistent with the results by I-V∕C-V deconvolution.
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