Abstract

Silicon nanowire transistors are measured at low temperature in the Coulomb blockade regime. Coulomb blockade spectroscopy permits to determine the gate, source and drain capacitances. We propose a model to explain the origin of both the gate and source (drain) capacitances for quantum dots formed in gated silicon nanowires. The gate capacitance is found to be determined by the gate-wire overlap capacitor and does not depend on gate voltage. On the contrary, the source (drain) capacitances increase with gate voltage. This feature is related to the increase of the electronic polarizability in the access regions.

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