Calibration for split capacitor DAC in SAR ADC

Abstract

The nonlinearity of split capacitor DAC (CDAC) in SAR ADC is mainly caused by the mismatch and parasitic effect of the bridge capacitor. A tunable capacitor array for compensation can be a solution. This paper first analyzes the nonlinearity of the split capacitor structure, and then proves that the linear tuning method results in linearity improvements and finally, an improved tunable structure is proposed by calculating the minimal step which keeps the tuning error within 0.5LSB. The new implementation achieves smaller area and less power consumption during the calibration, while maintaining the same circuit complexity. Behavioral Simulations based on a 5b-5b split DAC show that the proposed calibration further improves SNDR and SFDR by 2.2dB and 1.6dB, respectively compared with the prototype of compensation capacitor array.